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Getlein covers the principles of design

In Chapter 5, Getlein covers the principles of design. For each term listed, identify an art work art included in the text, Living with Art, but NOT mentioned in either Chapter 4 or Chapter 5, that illustrates the principle in question. Define the term in your own words and explain why you chose the artwork in 2-4 sentences.Note: in some cases you will find both the contrasting principles in the same work, (i.e. a painting that has both emphasis and subordination). A required part of this question is to explain WHY you chose each work. Make sure we can “see” what you are seeing. Please include the title of the artwork and also the page number (or figure number) that the artwork can be found on in your book.

  • unity and variety (describe an example of both terms here, either in the same work or in 2 different works)
  • symmetrical and asymmetrical balance (describe an example of both terms here, either in the same work or in 2 different works)
  • emphasis and subordination (describe an example of both terms here, either in the same work or in 2 different works)
  • scale and proportion (describe an example of both terms here, either in the same work or in 2 different works)
  • rhythm

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Hyperledger design principles

 In chapter 2, the author describes Hyperledger Fabric and its components. Create a new thread, choose one of the Hyperledger design principles described in chapter 2, and explain why your chosen design principle is important to a successfully enterprise blockchain implementation. I’m interested to read what YOU learned from this week’s reading. Do NOT submit a research paper. Tell me what you think.

Then think of three questions you’d like to ask other students and add these to the end of your thread. The questions should be taken from material you read in Chapter 1 or 2. You’re not trying to test each other, but you are trying to start a discussion.Files: BLCN532_Chapter_02.pdf

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Oli Gardener’s Expert Session: 7 Principles of Conversion-centered Design

Write a two page paper on the following question below:

Respond to the following prompts:

1. After watching Oli Gardener’s Expert Session: 7 Principles of Conversion-centered Design, please select any website and analyze how 1 of those principles is being or could be used for conversion purposes.  Provide a link to the website.  

2. Using the same website in 1) above, discuss the use of color and whether you think it was effective (using other sources).  Any recommendations you would make regarding the use of color?  How could the User Experience (UX) be improved? 

3. Navigate to a landing page on a website (it could be on the same website used in 1) above or a totally different one).  Provide the link to the landing page specifically.  Analyze 2 landing page related recommendations and whether the page is effectively using these. 

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Principals of 3D – Design Analysis and to carry out Finite Element Analysis

Computing, Engineering & Media (CEM)
Coursework 
Product Design and Development
Coursework 1 – Design Analysis
PART-A
i)The aims of the assignment are to understand the principals of 3D – Design Analysis and to carry out Finite Element Analysis on Simple Plate of size to be individually determined Y is between 120mm and 200mm inclusive, Z = Y/2; X = Y/2; C=Z/2 and D = 20% to 40% of Z, See figure below. The plate has uniform thickness of Z/4. (Please Ensure Individuality) Further aim is understanding the effects of different feature in a component and mesh density.
The objective is to produce a Simple Plate in the design package such as Creo6 and transferring the model into an Analysis package as and carrying out simulation of tensile stress. Initially the FEA package will Creo Simulate and then Ansys
Methodology requires applying fixed boundary conditions at one end and force/presser at the other end of the plate. You are to perform static stress analysis with linear material models on a classical problem by testing for different mesh densities.
Create the 3D design model in PTC Creo6

Attempt various mesh sizes starting from course to fine.
Initial Conditions: Fixed Boundary Conditions to be applied to one surface of the plate and a pressure to equivalent force of 40KN to be applied on the opposite surface.
Material to be used is Steel Low carbon Steel as listed in the materials library initially
Compare analysis results with classical stress calculations.
(ii) Further analysis can be carried out on a different size holes and section, such as a plate with Semi-circle notch (see below) on opposite edges and Square hole and also, different material and applying the same force/pressure to smaller area of 25% of the length Z in the middle. This will enable you to understand the effects of different type of features/parameters in a component
(iii) Discuss the methods for verifying results using classical formulae’s
Calculator for Stress Concentration Factor. Kt – FYI — https://www.efatigue.com/
? Rectangular Bars (https://www.efatigue.com/constantamplitude/stressconcentration/#a)
? Plate with a Circular Symmetric Hole
? Enter the value for ‘W’ width and Value for ‘d) Diameter ? Click on ‘Calculate Kt Value’
? Use the value to calculate total stress. Total Stress = Analysis Stress x Kt

(iv) Source and evaluate an actual product which has a component that is under tensile loading. Apply this type of analysis to a component and discuss the results.

This will develop your ability to understand the application of design packages, the effects of mesh density and to formulate decisions based on results obtained
Marks will be awarded for the following: –
Describing and explaining why the steps taken to produce the design and to carryout analysis with relevant printouts.
Discussing the results obtained and exploring variations and making recommendations. Evaluating and reporting on the effect of mesh density on stress and comparing it against the calculated vale using stress concentration factor.
Evaluating the effects of different diameters, together with different type of a hole for example square & notch and materials.
Verifying the results using classical methods.

Rectangular Bar with Opposite Edge Notches
Part B
The aim of the assignment is to develop your ability to model and analyze a component using design tools. The objective is to produce a design using a CAD package and to carry out Finite Element Analysis on an everyday engineering component. The product to consider is a common Bicycle Crank. Initial Dimensions for the Crank are as shown below.
Crank is modelled in PTC Creo 3D design package and can be saved as a *.PRT file.
CAD Data can be saved a neutral exchange file *. STEP is imported and analyzed in third party Simulation FEA package such as Ansys. Some third party can read *.PRT files directly and PTC Creo has integrated FEA package ‘Simulate’.

Dimensions for the Crank with Plain Holes
– Examples of Other Profiles for consideration for comparison are given as follows

Spigot – Parallel Fixing Profile Dimensions of the Spline

Spigot – Angled Fixing Profile Dimensions of the Spline

Another Example of Types of Fixing the Crank using a Flat Face
– Some other fixing could be just a square instead of a circle
This will further enhance the experience of using CAD and analysis by creating a model of bicycle crank and analyzing in Simulate/Ansys. This will highlight the benefits that can be gained from using design tools in the design process.
Conditions: Fixed Boundary Conditions to be applied to the surface on the 12mm hole in the R20 Boss initially.
Force of 1200N to be applied to the inner Nodes/Surface on the 10mm diameter hole in the 20mm boss on the Right-Hand Side
Material to be used is Medium carbon Steel listed in the materials library.
Design Safety Factor to consider is 4:1 at the Radii
Marks will be awarded for the following
Discuss the steps taken to produce the design and analysis with relevant printouts.
Consider the effects of Fixed Boundary Conditions and the Force applied at Nodal points or the Surface.
Discuss the results obtained and make recommendations.
Discuss the results obtained and explore variations and make recommendations. Evaluate and report on the effect of mesh density and the optimized shape of the Crank considering the effects of different radius and thickness as highlighted above on the Crank body.
Consider other analysis model such as an assembly with a Spigot in the Crank.
Verify the results using classical methods
Compare and Comment on the design of different type of fixing at the Crank and the spigot. For example, a key or tapered spigot or as per example given in the handout
Report Quality
Interim formative feedback during week 8.
Part C
Bending Stress Analysis of structural Section – Such as a Universal Beam – I-Beam. One Method of reducing weight of an I- Section and increase the load carrying capacity is to cut in Hexagon profile and weld the 2- sections as shown below.
Carryout Bending Stress on standard I section and a modified section with Beam of Appropriate length It is possible to modify the section provided on blackboard but use your own dimension that can be obtained from suppliers online.
For 1st analysis consider it as Cantilever with force 10KN; consider the effects of temperatures in extreme conditions.
Attempt Modal Analysis.
For 2nd Analysis consider it as a Simply Supported Beam.

(a)
(b) (c)
Part D – Bell Crank for Formula Student car in the workshop is given.
Look at the assembled components on the Formula car in the Mechanical Workshop and evaluate and discuss the loading conditions. Model the part with appropriate conditions and carry out analysis to determine the optimized the design with a safety factor of 4:1
Assemble pins in the holes and carry out further analysis for comparison. Look at the new design on the current car and compare.
Bell crank for Formula Student Car
Part E
Discuss types of FEA methods and the benefits of applying design analysis in the Product Life Cycle, use examples to illustrate your discussion. Discuss also the functional differences between Ansys and Creo Simulate.
Report Quality
Completed hardcopy of the report to be handed into CEMAC student advice Centre in Gateway House by 17th January 2020
Coursework 1 – Product Design Analysis (ENGD2051)
Assessment Sheet
Name:______________________________________
Marks will be awarded as per the student’s Handbook
Part- A
(i) Describe the steps taken to produce the design and to carryout analysis with relevant printouts.
Discuss the results obtained and explore variations and make recommendations. Evaluate and report on the effect of mesh density and compare against the stress concentration factor. Analyses of the effect of different diameters and materials can also be considered. Consider the effects of Fixed Boundary Conditions and the Force applied at Nodal points or, edge or on the Surface.
Test for the effect of applying the same pressure in smaller area of 25% of the length ‘Z’ 20%
(ii) Compare the effects of different features on stress. Analysis model such as Plate with a Square Hole and Semi-Circle Notches– Discuss the Kt factor and the stress values compare to circle 10%
(iii) Discuss the methods for verifying results using classical formulae’s 5%
(iv) Analyze a component from an actual product which is under tensile loading in operation and discuss the results. 10%
Part B – Carry out analysis and Discuss the results obtained and explore variations of bicycle crank feature and consider the factor of safety. Evaluate and report on the effect of mesh density and the optimized shape of the bicycle Crank covering the effect of different radius as highlighted above and thickness of the crank body. Consider the effects of Fixed Boundary Conditions and the type of Force Applied (Nodal points or, edge or Surface)
Consider other analysis model such as Spigot assembled to the crank for comparison.
Compare and Comment on the design of different type of fixing at the Crank and the spigot. For example, a key or tapered spigot or as per examples given in the handout. Comment on the results. 25%
Part C Evaluation of Universal Beam. Bending stress standard and modified, possible thermal, and modal analysis. 10%
Part D –
Bell Crank for Formula Student car in the workshop is given.
Look at the assembled components and discuss the loading conditions. Model the part with appropriate conditions and carry out analysis to determine the optimized the design with a safety factor of 4:1. Assemble pins in the holes and carry out further analysis for comparison. Look at the current design on the car and compare. 20%

Part E
Discuss types of FEA methods and the benefits of applying design analysis in the Product Life Cycle, use examples to illustrate your discussion. Also, discuss the functional differences between Ansys and Creo Simulate 5%

Report Quality
http://www.roymech.co.uk/Useful_Tables/Sections/steel_section_index.htm
http://www.pvrdirect.co.uk/productinfo.aspx?catref=SP1236&incvat&gclid=CLLNq4-esMkCFYvnwgod3V8AkQ

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One-Way Between-Subjects Design

Below are general types of ANOVA designs we will be reading about in this module. The differences in methodology are based on experimental design:

  1. One-Way Between-Subjects Design
  2. One-Way Within-Subjects (Repeated-Measures) Design

Debate the advantages and disadvantages of these two types of ANOVA designs with your classmates. Summarize the advantages and disadvantages of each from a statistical and practical perspective, and provide a real world example (one for each design) where each design might be used.

Pick one of your real-world examples and use your real world example to explain in detail, how the example you provided fits the design selected for that example. Make sure to discuss your:

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DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN

H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2019 Remarks:

 All the coursework has to be done in VHDL. Coursework handed in using another language will be marked as zero.

 Coursework must be typeset.  Never use screenshots or photograph of code in your coursework. Typeset code within your

coursework report using a monospace font (e.g. courier new).  Never use photographs of waveforms in your coursework. Use a proper screen capture tool to include

a high resolution screenshot in your coursework.

a) Consider the register bank of the educational processor (file cpuregbank.vhd of labcpu):

The objective is to create a testbench for this circuit, and simulate the a few operations including storing data in it as well as retrieving data from it.

In order to do this, use the file cpuregbank.vhd which is in labcpu zipfile. The file dffre.vhd is also required as it is used internally by the register bank.

H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2019

The ports of cpuregbank are:

clk : in STD_LOGIC; — Clock rst : in STD_LOGIC; — Reset signal (active high) d : in STD_LOGIC_VECTOR(7 downto 0) — Data to write to a register

— (when rwren is enabled) rwren : in STD_LOGIC — Set to 1 to write d into register rwr rwr : in STD_LOGIC_VECTOR(1 downto 0) — Selects which register to write to. — The register encoding is identical — to that used in the assembler

— instruction encoding. rrd1 : out STD_LOGIC_VECTOR(1 downto 0) — Select which register is

— mapped to q1 rrd2 : out STD_LOGIC_VECTOR(1 downto 0) — Select which register is

— mapped to q2 q1 : out STD_LOGIC_VECTOR(7 downto 0) — Content of register selected by rrd1 q2 : out STD_LOGIC_VECTOR(7 downto 0) — Content of register selected by rrd2 dbg_qa : in STD_LOGIC_VECTOR(7 downto 0) — This is a debug signal which has

— the content of register RA. It is — used in the lab to display the — register content on the 7-segment — display. (A production processor — would not have this signal)

dbg_qb : in STD_LOGIC_VECTOR(7 downto 0) — Same as dbg_qa but for RB dbg_qc : in STD_LOGIC_VECTOR(7 downto 0) — Same as dbg_qa but for RC dbg_qd : in STD_LOGIC_VECTOR(7 downto 0) — Same as dbg_qa but for RD

First, your test-bench should ensure a regular clock is driving clk with a clock period of 100ns, and a 50% duty cycle.

Then, the testbench should allow to test a variety of operations the sequence described hereafter.

i) Reset: The test bench should first reset the register bank. The reset is synchronous. It should also set rrd1, rrd2, d, rwr, rwren to zero.

ii) Store1: store the value 0x55 to register RA

iii) Store2: store the value 0xAA to register RB

iii) Store3: store the value 0xFF to register RC

iv) Load1: get the content of register RA on q1 and RB on q2

v) Load2: get the content of register RC on q1 and RD on q2

In the coursework report:

i) Explain the testbench file you constructed, what it does, and how it does it. In order to do that, provide the complete source of the testbench, and in the main text of your report explain the testbench file. By “explaining the testbench”, we ask you to first provide an overall explanation of how you intend to simulate the system, and then explain the purpose of each of the VHDL constructs you are using to realise the tests indicated above. Make sure you explain where the Reset, Store1, Store2, Store3, Load1, Load2 operations take place.

Note: if you create the testbench from Vivado’s user interface, a lot of default comments are inserted by Vivado. Remove these, as they are not useful for this coursework.

H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2019

ii) Provide a screen capture of the waveforms resulting from the testbench. All signals must be legible. Make sure that all the values in the waveforms are legible and in hex. Note: do not take photographs! Use a proper screen capture tool, such as pressing the “Print Screen” key. Explain what can be observed on these waveforms. Make sure you highlight on the waveform (e.g. with mspaint) where the operations Reset, Store1, Store2, Store3, Load1, Load2 operations take place.

All the register bank signals must be visible in the waveform.

[20 marks (10 marks for the testbench and associated explanation, 10 marks for the waveform and associated explanations; if the testbench does not work, not marks will be

assigned)]

b) Consider an input signal (i.e. a square wave) which has a maximum frequency of 1MHz. We want to count how many times the input signal transitioned from 0 to 1.

Detail three approaches to count the number of transitions.

i) the first approach should be a pure digital circuit (i.e. no processor).

ii) the second approach should consist only of a processor (UoS educational processor).

iii) the third approach should be a combination of processor (UoS educational processor) and a digital circuit (e.g. interfaced on the external I/O bus), both working together to acquire the number of transitions. You have significant flexibility here in finding an implementation that offers an advantage compared to (i) and (ii) in some interesting way. As a hint, consider that the input signal could have potentially a much higher clock frequency than the one at which the processor operates.

In the report:

i) explain the implementation of your system in a way that another engineer would understand it. In particular, provide schematic for variant (i) and (iii) and provide assembler code for variant (ii) and (iii). Explain your choice, and how your implementation works.

Make sure in the report that you do provide the code and schematic, and explain in the core text what the code or circuit does, and how.

ii) discuss the advantages and disadvantages of each approach.

[20 marks (5 marks per implementation with comments, 5 mark for the indentification of advantages and disadvantages]

c) The Sussex Educational Processor executes an instruction every 3 clock cycles. Explain why that is the case and specifically what happens during each of these three clock cycles.

[5 marks]

d) Explain and justify what is the maximum addressable memory for the processor using the mov instruction (note that this is not the amount of available memory, which was 32 bytes in the labs; it’s the maximum amount of memory which could be ‘touched’ by the processor).

[5 marks]

e) You are provided with the following VHDL code of a logic gate:

H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2019

entity something is port ( clk : in STD_LOGIC; s : in STD_LOGIC; r : in STD_LOGIC; d : in STD_LOGIC; q : out STD_LOGIC); end something; architecture Behavioral of something is begin process(clk) begin if s=’1′ then q<=’1′; else if clk’event and clk=’0′ then if r=’1′ then q <= ‘0’; else q <= not d; end if; end if; end if; end process; end Behavioral;

The resulting logic gate is a variation of a type of gate commonly used in digital systems. Explain what is this logic gate and how it behaves.

[5 marks]

f) Write an assembler program that performs a loop exactly n times, with the value n specified on 8-bits on the external interface. Write down: i) the assembler code; ii) an explanation of what the assembler code does, line by line.

[10 marks (5 marks for the program, 5 for the explanations)]

g) Consider the program below. Explain line by line the operation performed by the instruction and the resulting register values for registers RA, RB, RC, RD. Write the value that is in the register after the execution of the instruction in the corresponding column; if the value is unknown indicated this with ??. Assume we do not know the content of the registers on program start.

RA RB RC RD mov rb,32h . . . . xor rd,rd . . . . sub rd,rb . . . . shr rb . . . . asr rd . . . .

[5 marks (1 mark per correct line)]

h) You are provided with the following memory dump. Write the assembler instructions corresponding to this memory dump.

H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2019

Address Data 00 1330 02 3303 04 5770 06 B10A 08 B002

[5 marks (1 per correct instruction)]

i) Explain how many total number of ALU operations could be realised in the UoS Educational Processor if you modified the cpualu.vhd keeping the current structure of the instruction encoding, and provide an explanation for your answer.

[5 marks]

j) Consider the instruction “MOV [RB], RD” (assume RA=08h,RB=55h,RC=37h,RD=A0h). Assume we are shortly before the clock edge of the “execute” cycle (i.e. at the next rising edge the instruction will be executed).

By analyzing the VHDL code of the processor, explain what happens inside the educational processor to execute this instruction. Specifically, indicate the state of the following signals (or indicate if undefined):

instruction (in cpu.vhd) rrd1 (port of cpuregbank in cpu.vhd) rrd2 (port of cpuregbank in cpu.vhd) rwr (port of cpuregbank in cpu.vhd) d (port of cpuregbank in cpu.vhd) reg1out (in cpu.vhd) reg2out (in cpu.vhd) source (in cpu.vhd) regwren (in cpu.vhd) flagwren (in cpu.vhd) ram_we (in cpu.vhd) ram_address (in cpu.vhd) ram_datawr (in cpu.vhd) op (port of cpualu in cpu.vhd) a (port of cpualu in cpu.vhd) b (port of cpualu in cpu.vhd) aluqout (in cpu.vhd) alufout (in cpu.vhd) wrdata (in cpu.vhd) finally, summarize the overall processor behavior with this instruction.

[20 marks (1 mark per correct signal value, 1 mark for a correct explanation)]

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standardize navigation elements and design style

Produce a graphical layout of the web pages from www.fanatics.com listing standardize navigation elements and design style.  Choose an item from www.fanatics.com and follow it from the home page through to completion of purchase on the shopping cart.  Show the layout of each page.  Pages to also include are major category pages, customer service pages, as well as privacy and security pages. (slides 2-16) http://www.authorstream.com/Presentation/nortloff-1436310-week-6-layout-sv/


Note: For this week’s assignment you will give me a look at your webpages as you follow a product to purchase.  So, you will need to show me where the product is posted, everything that the customer will see.  You will need to show the navigational elements, so that I can see the process.  You will want to add some written text explaining what you are doing.  I don’t want you to create a complete site and use that.  You should do a layout before you put a site into action.  I want to see the layout.  I have a couple of examples for you in the Resources links of the week 6 lecture link.

Criteria
Graphical layout
Produced a graphical layout of the web pages in your site listing standardize navigation elements and design style. pts 30.0


Follow through purchase
Chose an item from your web store and followed it from the home page through to completion of purchase on the shopping cart. pts 30.0


Page layouts
Showed the layout of each page including: all major category pages, customer service pages, as well as privacy and security pages.  pts 40.0


See Attchment For  Example of graphical layouts

 

Resources

http://yahoo.com (Links to an external site.)
http://www.apple.com (Links to an external site.)
http://www.amazon.com (Links to an external site.)
http://www.sony.com (Links to an external site.)
http://www.cnn.com (Links to an external site.)
http://www.google.com (Links to an external site.)

Browser Compatibility Testing Tools https://www.keycdn.com/blog/browser-compatibility-testing-tools/  (Links to an external site.)

Bank, Larissa, Create Photoshop Layouts http://www.larabank.com/class/